A repeater circuit in a digital communication system generally operates as an intermediate node in the course of transmitting a signal from an origin node to a destination node. The repeater receives a digital signal transmitted from the origin node via the first link of a transmission medium, such as an electrical cable, and outputs a modified version of the input signal via a second link to the destination node (which may be a further repeater). The modifications made to the signal by the repeater are generally intended to eliminate analog artifacts introduced to the signal by the first link of the transmission medium, such as signal attenuation or phase jitter, and generally to improve the scan input (SI) of the communication link.
A repeater or destination node in such a system is able to track relatively low-frequency jitter on an incoming data signal. The clock signal used to sample the input data signal is extracted from the input data signal and incorporates the same low-frequency jitter as the input data signal. This effectively eliminates the possibility of bit sampling errors. However, the output signal created by this method of sampling also contains the same jitter contained in the input data signal. In the case of a repeater signal, this means that the low-frequency jitter is transferred to the destination node as part of the output signal of the repeater. If additional jitter is then introduced by the second link in the transmission (between the repeater and the destination node), the total amount of jitter reaching the destination node may exceed the destination node's jitter tolerance, resulting in bit errors in sampling at the destination.
Thus, when a traditional repeater is inserted in a link, the jitter budget in the second portion of the link (downstream from the repeater) is influenced by how much jitter is transferred by the repeater. Traditional repeaters track and transfer jitter with the same bandwidth. This makes the amount of jitter in the second half of the link unpredictable and potentially disruptive.
Repeater circuits have been made that incorporate additional jitter termination components designed to filter this low-frequency jitter out of the output signal, thereby decoupling jitter tracking and jitter transfer and resulting in a cleaner output signal to the destination node. However, these jitter termination mechanisms for repeater circuits typically make use of expensive filter components such as phase-locked loops (PLLs) which occupy a large area on a circuit die and introduce additional analog artifacts that can reduce jitter tolerance at commonly-encountered frequencies.